Home
About
News
Consortium
Media
Results
Duration
in months
Project
Partners
Involved
Countries
Budget in
Millon €
Plan ahead
Prototype software technologies as tools portable across RISC-V processor devices, and suitable to test a wide variety of performance requirements
Build on available RISC-V processor prototypes to ease development and validation
Assess in specific use cases
RIGOLETTO objectives
Establish the foundation for a next-generation Automotive Hardware Platform based on the open RISC-V instruction set architecture (ISA).
Strongly linked with the software-defined vehicle ecosystem led by European automotive manufacturers and suppliers.
Develop RISC-V intellectual property (IP) components, including processor cores, accelerators, interconnects, memory hierarchy and peripheral subsystems, to enable increasingly electrified, automated, and connected vehicles.
BSC Performance Validation Solution
Obtain performance requirement specifications
Real-time requirements, deadlines, dependencies, communications, and any type of constraint relating to safety requirements
Specify them in a way that they can be measured and assessed
Analyze processor characteristics to devise how software must be scheduled and consolidated
Set appropriate hardware configurations enabling the achievement of the performance requirements
Determine experiments and workloads needed to test performance requirements
Tailor test benchmarks needed to stress the system and assess performance requirements
Home
About
News
Consortium
Media
Results